The present invention relates to the transmission of data, and more particularly to a low jitter direct digital frequency synthesizer (DDFS) modulator for transmitting asynchronous data as a frequency modulated signal using frequency shift keying (FSK).
The direct digital method of producing frequency modulation has many advantages including crystal controlled accuracy and freedom from adjustment, drift and component aging. A simple method of using a direct digital frequency synthesizer to generate a frequency shift keyed output signal is to clock asynchronous data into a flip-flop, the clock frequency being much higher than the data frequency. An edge generator creates a transition signal that frequency modulates the DDFS, the edge generator being a digital lowpass filter that may produce a linear ramp, a raised cosine edge or some other transition such that the FSK spectrum is well contained. The problem with this approach is that, due to the sampling, up to one clock period of time jitter or uncertainty is introduced into the data signal. To reduce this jitter the clock frequency may be increased, but there is a practical limit to the amount the clock frequency may be increased.
Therefore what is desired is a method of producing a low jitter DDFS FSK modulator that determines the location of data transitions to a fraction of one clock period without using a higher clock frequency.